“存器”造句

該比較器包含一級(jí)預(yù)放大器 、 動(dòng)態(tài)鎖存器及時(shí)鐘控制反相器.
The comparator includes a preamplifier, a dynamic latch and a clocked inverter.

具體電路由鎖存器、選擇器及分頻器組成,以CMOS邏輯 和源極耦合邏輯 ( SCL ) 實(shí)現(xiàn).
They are implemented with CMOS logic and source coupled logic ( SCL ).

然后裝入暫存器并傳輸控制到選定的過程.
It then reload s register and transfers control to the selected process.

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